Present complementary metal oxide semiconductor (CMOS) synchronous dynamic random access memory (SDRAM) circuits are frequently used for main memory in a variety of applications including desk top and portable computer systems. Advances in manufacturing technology have greatly improved the process and reduced the defect density associated with these memory circuits. With continued reductions in memory circuit feature sizes, however, some defects in memory circuits are unavoidable. Memory manufacturers frequently incorporate redundancy circuits to repair faulty rows, columns and bits that result from these unavoidable defects. Redundant repair of faulty memory elements produces a memory circuit with all memory cells fully functional but it does not remove the original defect.
Some of these defects may still compromise functionality of the memory circuit even after redundant repair. A short circuit between adjacent word lines, for example, may cause an increase in current consumption when one of the word lines is driven high and the other is held low during an active part of a memory cycle. Repair of such a defect may require replacement of both word lines. A more serious problem occurs when a word fine is shorted to a bit line. Replacement of the word line and bit line may restore functionality, but current consumption may still be unacceptable for two reasons. First, the bit line is frequently precharged to a bit line reference voltage (BLR) intermediate the supply voltage (Vdd) and ground (Vss) during a standby part of the memory cycle. Current consumption is limited by product specification to a value far below that of the active part of the memory cycle during this standby part of the memory cycle. Thus, the word line to bit line short will frequently exceed product specification.
Second, bit lines are perpetually precharged during the standby part of the memory cycle. A constant current, therefore, is perpetually consumed by the memory circuit even though the memory circuit may not be accessed for extended periods. Maximum allowable standby current for a memory circuit is often specified as an average current. This average current consumption is increased due to a word line to bit line short for the duration of the standby part of the memory cycle. Thus, current consumption due to the word line to bit line short frequently exceeds the maximum allowable standby current specification and renders the memory circuit unrepairable.